geometry process details principal device types cmut5401 cmpt5401 cxt5401 gross die per 4 inch wafer 29,659 process cp716v small signal transistors pnp - high voltage transistor chip process epitaxial planar die size 19.7 x 19.7 mils die thickness 7.1 mils base bonding pad area 4.0 x 4.0 mils emitter bonding pad area 4.7 x 4.7 mils top side metalization al - 30,000? back side metalization au - 18,000? backside collector www.centralsemi.com r2 (22-march 2010)
process cp716v typical electrical characteristics www.centralsemi.com r2 (22-march 2010)
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